In the art of fabricating integrated circuits (ICs), it is well known that continuing goals are to make the circuits smaller, more dense and have faster operating speeds. The high speed capabilities of the most advanced emitter coupled logic (ECL) gate array products require multiple ground and power planes for their proper functioning. Typically, these multiple ground and power planes are provided by means of a substrate, such as a printed circuit board (PCB) having multiple layers of electrically conductive and dielectric materials, where the conductive layers provide the ground and power planes.
It is also well known that an increasingly important consideration in the production and use of ICs is the package in which the IC resides. The module or casing in which the IC is packaged is an important factor in the ultimate cost, performance and lifetime of the IC. For example, as ICs become more dense, dissipation of the thermal energy generated by them in an efficient manner becomes increasingly important in permitting their useful life to be as long as possible. Another consideration as the circuits become denser is that the number of leads to the package and connections from the leads to the integrated circuit pads increases; thus increasing the complexity of construction and adding to the cost of the end product, not just in terms of increased and more expensive materials, but also increased production costs. These considerations are aggravated with the requirements of high speed circuits, as noted above.
Another factor affecting the design of IC packages is the advent of surface mount technology, whereby space is conserved on the PCBs by mounting the packages directly on the conductive patterns of the circuit board, rather than by extending the leads through holes in the board. One conflict in using surface mount technology is that high performance, multi-layer PCBs generally require through-hole mounting of devices, whereas surface mount devices tolerate only fewer layers. Further, while circuit board space is conserved with surface mount packages, another concern is that the leads of the IC package must be formed much more carefully with particular attention to the coplanarity of the leads that are to be affixed to the conductive pattern. Lack of lead coplanarity will result in the absence of a connection at the lead that is out of the plane of the majority of the leads.
Thus, a continuing goal in the art of providing packages for electronic components such as integrated circuits is a package design that will address these multiple goals satisfactorily in an arrangement that can be reliably manufactured at the lowest cost.